numeric_std_unsigned.vhdl This package is a "standardized" verion of "std_logic_unsigned" which appears in many vendor tools.
Use model:
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee_proposed.numeric_std_additions.all;
use ieee_proposed.numeric_std_unsigned.all;
VHDL-2008 use model:
use ieee.numeric_std_unsigned.all;
Dependencies: ieee.std_logic_1164, ieee.numeric_std
This package treats "std_logic_vector" and "std_ulogic_vector" just like the "unsigned" type in ieee.numeric_std. It has all of the funcitionality of the old "std_logic_unsigned" package with the ability to use "std_ulogic_vector".
Please send feedback to David W. Bishop dbishop@vhdl.org.